Senior Packaging Engineer

Senior Package Design Engineer
Location: Austin, TX (Onsite)
Salary: $200,000–$400,000 + Equity
Type: Full-time, Permanent

My client, an ambitious AI hardware company, is developing next-generation accelerators designed to improve the performance and efficiency of AI infrastructure. They are looking for a Senior / Staff Packaging Engineer to lead advanced ASIC packaging, from architecture and substrate design through simulation, integration and production readiness.

Key Responsibilities

• Lead advanced package design for ASIC-to-substrate integration, including bump mapping, substrate routing, floorplanning and stack-up definition
• Develop 2.5D and 3D package architectures for multi-die and chiplet-based designs
• Own the package design flow from concept and layout through simulation, verification, sign-off and manufacturing support
• Run package-level signal and power integrity (SI/PI) simulations to optimise performance and power delivery
• Drive substrate and PCB co-design, ensuring alignment between silicon, package and board-level interfaces
• Establish package design methodologies, libraries, workflows and implementation guidelines
• Collaborate with ASIC, thermal, mechanical and systems engineers, as well as substrate vendors and manufacturing partners
• Support prototype builds, qualification, failure analysis and productisation

Requirements

• Deep expertise in advanced semiconductor packaging for ASICs or other high-performance products
• Strong experience in front-end package design and ASIC-to-substrate integration
• Hands-on experience with 2.5D and/or 3D packaging architectures
• Proficiency with package design tools such as Cadence Allegro, Siemens Xpedition or equivalent
• Experience leading package development across layout, simulation, verification and release
• Strong PI/SI simulation experience using tools such as Ansys SIwave, Cadence Sigrity or equivalent
• Experience in substrate design and package-to-board integration
• Understanding of manufacturability, interconnect technologies and package reliability
• Relevant degree in engineering or physical sciences

Desirable

• Experience with AI accelerators, HPC, networking or advanced data-centre hardware
• Familiarity with wafer-level packaging, package qualification and failure analysis
• Experience mentoring engineers and supporting new product introduction

What’s on Offer

• $200k–$400k salary, depending on experience
• Meaningful equity and stock options
• Annual living-local bonus for those residing within 20 minutes of the office
• Employer-contributed retirement benefits
• Onsite working in Austin, Texas
• Opportunity to shape advanced packaging technology for next-generation AI hardware